drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5555

#define mmGDS_VMID3_BASE 0x20a6

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

5184

#define mmGDS_VMID3_BASE 0x20a6

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

3055

#define mmGDS_VMID3_BASE 0x1306

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3285

#define mmGDS_VMID3_BASE 0x1306

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3235

#define mmGDS_VMID3_BASE 0x1306

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2220

#define mmGDS_VMID3_BASE 0x3306

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2242

#define mmGDS_VMID3_BASE 0x3306

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2440

#define mmGDS_VMID3_BASE 0x3306

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2419

#define mmGDS_VMID3_BASE 0x3306