drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5547

#define mmGDS_VMID1_BASE 0x20a2

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

5176

#define mmGDS_VMID1_BASE 0x20a2

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

3047

#define mmGDS_VMID1_BASE 0x1302

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3277

#define mmGDS_VMID1_BASE 0x1302

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3227

#define mmGDS_VMID1_BASE 0x1302

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2218

#define mmGDS_VMID1_BASE 0x3302

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2240

#define mmGDS_VMID1_BASE 0x3302

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2438

#define mmGDS_VMID1_BASE 0x3302

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2417

#define mmGDS_VMID1_BASE 0x3302