drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2983

#define mmGC_USER_RB_BACKEND_DISABLE 0x147f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2950

#define mmGC_USER_RB_BACKEND_DISABLE 0x147f

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

1059

#define mmGC_USER_RB_BACKEND_DISABLE 0x06df

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

1029

#define mmGC_USER_RB_BACKEND_DISABLE 0x06df

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

995

#define mmGC_USER_RB_BACKEND_DISABLE 0x06df

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

691

#define mmGC_USER_RB_BACKEND_DISABLE 0x26DF

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

687

#define mmGC_USER_RB_BACKEND_DISABLE 0x26df

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

700

#define mmGC_USER_RB_BACKEND_DISABLE 0x26df

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

772

#define mmGC_USER_RB_BACKEND_DISABLE 0x26df

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

772

#define mmGC_USER_RB_BACKEND_DISABLE 0x26df