drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2961

#define mmCB_HW_CONTROL_1 0x1425

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2928

#define mmCB_HW_CONTROL_1 0x1425

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

1045

#define mmCB_HW_CONTROL_1 0x0681

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

1015

#define mmCB_HW_CONTROL_1 0x0681

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

981

#define mmCB_HW_CONTROL_1 0x0681

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

278

#define mmCB_HW_CONTROL_1 0x2685

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

139

#define mmCB_HW_CONTROL_1 0x2685

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

139

#define mmCB_HW_CONTROL_1 0x2685

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

156

#define mmCB_HW_CONTROL_1 0x2685

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

156

#define mmCB_HW_CONTROL_1 0x2685