drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h

6030

#define mmD4VGA_CONTROL 0xf9

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h

6107

#define mmD4VGA_CONTROL 0xf9

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h

7781

#define mmD4VGA_CONTROL 0xf9

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h

642

#define mmD4VGA_CONTROL 0x0039

drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h

1044

#define mmD4VGA_CONTROL 0x00F9

drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h

5147

#define mmD4VGA_CONTROL 0xf9

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h

452

#define mmD4VGA_CONTROL 0x0039

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h

120

#define mmD4VGA_CONTROL 0x0039

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h

140

#define mmD4VGA_CONTROL 0x0039

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h

102

#define mmD4VGA_CONTROL 0x0039

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_offset.h

188

#define mmD4VGA_CONTROL 0x0039

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h

120

#define mmD4VGA_CONTROL 0x0039

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h

105

#define mmD4VGA_CONTROL 0x0039