drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h

6029

#define mmD3VGA_CONTROL 0xf8

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h

6106

#define mmD3VGA_CONTROL 0xf8

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h

7780

#define mmD3VGA_CONTROL 0xf8

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h

640

#define mmD3VGA_CONTROL 0x0038

drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h

1043

#define mmD3VGA_CONTROL 0x00F8

drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h

5146

#define mmD3VGA_CONTROL 0xf8

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h

450

#define mmD3VGA_CONTROL 0x0038

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h

118

#define mmD3VGA_CONTROL 0x0038

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h

138

#define mmD3VGA_CONTROL 0x0038

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h

100

#define mmD3VGA_CONTROL 0x0038

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_offset.h

186

#define mmD3VGA_CONTROL 0x0038

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h

118

#define mmD3VGA_CONTROL 0x0038

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h

103

#define mmD3VGA_CONTROL 0x0038