drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2177

#define mmCP_STAT 0x0f40

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2258

#define mmCP_STAT 0x0f40

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

175

#define mmCP_STAT 0x01a0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

175

#define mmCP_STAT 0x01a0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

169

#define mmCP_STAT 0x01a0

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

550

#define mmCP_STAT 0x21A0

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

495

#define mmCP_STAT 0x21a0

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

508

#define mmCP_STAT 0x21a0

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

564

#define mmCP_STAT 0x21a0

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

564

#define mmCP_STAT 0x21a0