drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5033

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x1e8c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4692

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x1e8c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2386

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x1047

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

2663

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x1047

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

2601

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x1047

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

522

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

219

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

219

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

243

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

244

#define mmCP_RB_WPTR_POLL_ADDR_HI 0x3047