drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

4709

#define mmCP_RB_BASE 0x1de0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4364

#define mmCP_RB_BASE 0x1de0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2364

#define mmCP_RB_BASE 0x1040

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

2641

#define mmCP_RB_BASE 0x1040

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

2579

#define mmCP_RB_BASE 0x1040

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

512

#define mmCP_RB_BASE 0x3040

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

197

#define mmCP_RB_BASE 0x3040

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

197

#define mmCP_RB_BASE 0x3040

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

221

#define mmCP_RB_BASE 0x3040

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

222

#define mmCP_RB_BASE 0x3040