drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

4795

#define mmCP_RB1_RPTR_ADDR_HI 0x1e03

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4448

#define mmCP_RB1_RPTR_ADDR_HI 0x1e03

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2454

#define mmCP_RB1_RPTR_ADDR_HI 0x1063

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

2731

#define mmCP_RB1_RPTR_ADDR_HI 0x1063

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

2669

#define mmCP_RB1_RPTR_ADDR_HI 0x1063

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

504

#define mmCP_RB1_RPTR_ADDR_HI 0x3063

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

212

#define mmCP_RB1_RPTR_ADDR_HI 0x3063

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

212

#define mmCP_RB1_RPTR_ADDR_HI 0x3063

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

236

#define mmCP_RB1_RPTR_ADDR_HI 0x3063

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

237

#define mmCP_RB1_RPTR_ADDR_HI 0x3063