drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

4793

#define mmCP_RB1_RPTR_ADDR 0x1e02

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4446

#define mmCP_RB1_RPTR_ADDR 0x1e02

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2452

#define mmCP_RB1_RPTR_ADDR 0x1062

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

2729

#define mmCP_RB1_RPTR_ADDR 0x1062

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

2667

#define mmCP_RB1_RPTR_ADDR 0x1062

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

503

#define mmCP_RB1_RPTR_ADDR 0x3062

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

208

#define mmCP_RB1_RPTR_ADDR 0x3062

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

208

#define mmCP_RB1_RPTR_ADDR 0x3062

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

232

#define mmCP_RB1_RPTR_ADDR 0x3062

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

233

#define mmCP_RB1_RPTR_ADDR 0x3062