Symbol: mmCP_RB0_WPTR_HI
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
4765
#define mmCP_RB0_WPTR_HI 0x1df5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
4418
#define mmCP_RB0_WPTR_HI 0x1df5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2424
#define mmCP_RB0_WPTR_HI 0x1055
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
2701
#define mmCP_RB0_WPTR_HI 0x1055
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
2639
#define mmCP_RB0_WPTR_HI 0x1055