drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

4721

#define mmCP_RB0_RPTR_ADDR_HI 0x1de4

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4376

#define mmCP_RB0_RPTR_ADDR_HI 0x1de4

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2376

#define mmCP_RB0_RPTR_ADDR_HI 0x1044

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

2653

#define mmCP_RB0_RPTR_ADDR_HI 0x1044

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

2591

#define mmCP_RB0_RPTR_ADDR_HI 0x1044

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

498

#define mmCP_RB0_RPTR_ADDR_HI 0x3044

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

210

#define mmCP_RB0_RPTR_ADDR_HI 0x3044

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

210

#define mmCP_RB0_RPTR_ADDR_HI 0x3044

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

234

#define mmCP_RB0_RPTR_ADDR_HI 0x3044

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

235

#define mmCP_RB0_RPTR_ADDR_HI 0x3044