drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2229

#define mmCP_MEQ_THRESHOLDS 0x0f79

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2312

#define mmCP_MEQ_THRESHOLDS 0x0f79

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

227

#define mmCP_MEQ_THRESHOLDS 0x01d9

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

227

#define mmCP_MEQ_THRESHOLDS 0x01d9

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

221

#define mmCP_MEQ_THRESHOLDS 0x01d9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

459

#define mmCP_MEQ_THRESHOLDS 0x21D9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

538

#define mmCP_MEQ_THRESHOLDS 0x21d9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

551

#define mmCP_MEQ_THRESHOLDS 0x21d9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

604

#define mmCP_MEQ_THRESHOLDS 0x21d9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

604

#define mmCP_MEQ_THRESHOLDS 0x21d9