Symbol: mmCP_HQD_WG_STATE_OFFSET
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
5403
#define mmCP_HQD_WG_STATE_OFFSET 0x1fd9
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
5038
#define mmCP_HQD_WG_STATE_OFFSET 0x1fd9
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2919
#define mmCP_HQD_WG_STATE_OFFSET 0x1275
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
3147
#define mmCP_HQD_WG_STATE_OFFSET 0x1275
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
3103
#define mmCP_HQD_WG_STATE_OFFSET 0x1275
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h
681
#define mmCP_HQD_WG_STATE_OFFSET 0x3275
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h
681
#define mmCP_HQD_WG_STATE_OFFSET 0x3275