drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5321

#define mmCP_HQD_PQ_BASE_HI 0x1fb2

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4956

#define mmCP_HQD_PQ_BASE_HI 0x1fb2

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2837

#define mmCP_HQD_PQ_BASE_HI 0x124e

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3065

#define mmCP_HQD_PQ_BASE_HI 0x124e

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3021

#define mmCP_HQD_PQ_BASE_HI 0x124e

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

576

#define mmCP_HQD_PQ_BASE_HI 0x324e

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

589

#define mmCP_HQD_PQ_BASE_HI 0x324e

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

639

#define mmCP_HQD_PQ_BASE_HI 0x324e

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

639

#define mmCP_HQD_PQ_BASE_HI 0x324e