drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5347

#define mmCP_HQD_IQ_RPTR 0x1fc0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4982

#define mmCP_HQD_IQ_RPTR 0x1fc0

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2863

#define mmCP_HQD_IQ_RPTR 0x125c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3091

#define mmCP_HQD_IQ_RPTR 0x125c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3047

#define mmCP_HQD_IQ_RPTR 0x125c

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

590

#define mmCP_HQD_IQ_RPTR 0x325c

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

603

#define mmCP_HQD_IQ_RPTR 0x325c

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

653

#define mmCP_HQD_IQ_RPTR 0x325c

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

653

#define mmCP_HQD_IQ_RPTR 0x325c