drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5337

#define mmCP_HQD_IB_BASE_ADDR 0x1fbb

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4972

#define mmCP_HQD_IB_BASE_ADDR 0x1fbb

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2853

#define mmCP_HQD_IB_BASE_ADDR 0x1257

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3081

#define mmCP_HQD_IB_BASE_ADDR 0x1257

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3037

#define mmCP_HQD_IB_BASE_ADDR 0x1257

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

585

#define mmCP_HQD_IB_BASE_ADDR 0x3257

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

598

#define mmCP_HQD_IB_BASE_ADDR 0x3257

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

648

#define mmCP_HQD_IB_BASE_ADDR 0x3257

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

648

#define mmCP_HQD_IB_BASE_ADDR 0x3257