Symbol: mmCP_HQD_EOP_BASE_ADDR
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
5381
#define mmCP_HQD_EOP_BASE_ADDR 0x1fce
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
5016
#define mmCP_HQD_EOP_BASE_ADDR 0x1fce
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2897
#define mmCP_HQD_EOP_BASE_ADDR 0x126a
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
3125
#define mmCP_HQD_EOP_BASE_ADDR 0x126a
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
3081
#define mmCP_HQD_EOP_BASE_ADDR 0x126a
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h
670
#define mmCP_HQD_EOP_BASE_ADDR 0x326a
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h
670
#define mmCP_HQD_EOP_BASE_ADDR 0x326a