drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5349

#define mmCP_HQD_DEQUEUE_REQUEST 0x1fc1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4984

#define mmCP_HQD_DEQUEUE_REQUEST 0x1fc1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2865

#define mmCP_HQD_DEQUEUE_REQUEST 0x125d

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3093

#define mmCP_HQD_DEQUEUE_REQUEST 0x125d

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3049

#define mmCP_HQD_DEQUEUE_REQUEST 0x125d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

591

#define mmCP_HQD_DEQUEUE_REQUEST 0x325d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

604

#define mmCP_HQD_DEQUEUE_REQUEST 0x325d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

654

#define mmCP_HQD_DEQUEUE_REQUEST 0x325d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

654

#define mmCP_HQD_DEQUEUE_REQUEST 0x325d