drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2127

#define mmCP_CPC_STATUS 0x0e24

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2204

#define mmCP_CPC_STATUS 0x0e24

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

121

#define mmCP_CPC_STATUS 0x0084

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

121

#define mmCP_CPC_STATUS 0x0084

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

123

#define mmCP_CPC_STATUS 0x0084

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

311

#define mmCP_CPC_STATUS 0x2084

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

314

#define mmCP_CPC_STATUS 0x2084

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

350

#define mmCP_CPC_STATUS 0x2084

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

350

#define mmCP_CPC_STATUS 0x2084