drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

7337

#define mmCP_CE_IB2_BASE_LO 0x20c9

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

6976

#define mmCP_CE_IB2_BASE_LO 0x20c9

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

4833

#define mmCP_CE_IB2_BASE_LO 0x20c9

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

5063

#define mmCP_CE_IB2_BASE_LO 0x20c9

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

5019

#define mmCP_CE_IB2_BASE_LO 0x20c9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

376

#define mmCP_CE_IB2_BASE_LO 0x21C9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

520

#define mmCP_CE_IB2_BASE_LO 0xc0c9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

533

#define mmCP_CE_IB2_BASE_LO 0xc0c9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

586

#define mmCP_CE_IB2_BASE_LO 0xc0c9

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

586

#define mmCP_CE_IB2_BASE_LO 0xc0c9