Symbol: mmCPG_UTCL1_STATUS
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
5157
#define mmCPG_UTCL1_STATUS 0x1f54
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
4824
#define mmCPG_UTCL1_STATUS 0x1f54
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2665
#define mmCPG_UTCL1_STATUS 0x11b4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
2917
#define mmCPG_UTCL1_STATUS 0x11b4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
2851
#define mmCPG_UTCL1_STATUS 0x11b4