Symbol: mmCPC_UTCL1_STATUS
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
5159
#define mmCPC_UTCL1_STATUS 0x1f55
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
4826
#define mmCPC_UTCL1_STATUS 0x1f55
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2667
#define mmCPC_UTCL1_STATUS 0x11b5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
2919
#define mmCPC_UTCL1_STATUS 0x11b5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
2853
#define mmCPC_UTCL1_STATUS 0x11b5