drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2847

#define mmCC_RB_BACKEND_DISABLE 0x13dd

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2910

#define mmCC_RB_BACKEND_DISABLE 0x13dd

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

935

#define mmCC_RB_BACKEND_DISABLE 0x063d

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

905

#define mmCC_RB_BACKEND_DISABLE 0x063d

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

871

#define mmCC_RB_BACKEND_DISABLE 0x063d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

292

#define mmCC_RB_BACKEND_DISABLE 0x263D

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

685

#define mmCC_RB_BACKEND_DISABLE 0x263d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

698

#define mmCC_RB_BACKEND_DISABLE 0x263d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

770

#define mmCC_RB_BACKEND_DISABLE 0x263d

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

770

#define mmCC_RB_BACKEND_DISABLE 0x263d