drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

2959

#define mmCB_HW_CONTROL 0x1424

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

2926

#define mmCB_HW_CONTROL 0x1424

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

1043

#define mmCB_HW_CONTROL 0x0680

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

1013

#define mmCB_HW_CONTROL 0x0680

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

979

#define mmCB_HW_CONTROL 0x0680

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

277

#define mmCB_HW_CONTROL 0x2684

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

138

#define mmCB_HW_CONTROL 0x2684

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

138

#define mmCB_HW_CONTROL 0x2684

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

155

#define mmCB_HW_CONTROL 0x2684

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

155

#define mmCB_HW_CONTROL 0x2684