drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h

89

#define ixUVD_CGC_CTRL2 0xc1

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h

26

#define ixUVD_CGC_CTRL2 0x00C1

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h

87

#define ixUVD_CGC_CTRL2 0xc1

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h

98

#define ixUVD_CGC_CTRL2 0xc1

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h

114

#define ixUVD_CGC_CTRL2 0xc1

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h

1510

#define ixUVD_CGC_CTRL2 0x0001

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_offset.h

1985

#define ixUVD_CGC_CTRL2 0x0001

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_offset.h

2320

#define ixUVD_CGC_CTRL2 0x0001

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h

1647

#define ixUVD_CGC_CTRL2 0x0001

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_offset.h

28

#define ixUVD_CGC_CTRL2 0x0001