drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

13437

#define ixSQ_WAVE_VALID_AND_IDLE 0x000b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h

11646

#define ixSQ_WAVE_VALID_AND_IDLE 0x000b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h

12053

#define ixSQ_WAVE_VALID_AND_IDLE 0x000b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h

9962

#define ixSQ_WAVE_VALID_AND_IDLE 0x000b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h

11005

#define ixSQ_WAVE_VALID_AND_IDLE 0x000b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h

12368

#define ixSQ_WAVE_VALID_AND_IDLE 0x000b

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h

7644

#define ixSQ_WAVE_VALID_AND_IDLE 0x000a

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h

7406

#define ixSQ_WAVE_VALID_AND_IDLE 0x000a