drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

11189

#define ixSQ_WAVE_STATUS 0x0102

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

13439

#define ixSQ_WAVE_STATUS 0x0102

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h

11648

#define ixSQ_WAVE_STATUS 0x0102

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h

12055

#define ixSQ_WAVE_STATUS 0x0102

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h

9964

#define ixSQ_WAVE_STATUS 0x0102

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h

11007

#define ixSQ_WAVE_STATUS 0x0102

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_offset.h

12370

#define ixSQ_WAVE_STATUS 0x0102

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

7098

#define ixSQ_WAVE_STATUS 0x0012

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

7306

#define ixSQ_WAVE_STATUS 0x0012

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

7345

#define ixSQ_WAVE_STATUS 0x0012

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h

7646

#define ixSQ_WAVE_STATUS 0x0012

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_offset.h

7408

#define ixSQ_WAVE_STATUS 0x0012

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

89

#define ixSQ_WAVE_STATUS 0x0012

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1913

#define ixSQ_WAVE_STATUS 0x12

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

1934

#define ixSQ_WAVE_STATUS 0x12

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2133

#define ixSQ_WAVE_STATUS 0x12

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2101

#define ixSQ_WAVE_STATUS 0x12