drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

10768

#define ixGC_CAC_CNTL 0x0011

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

12702

#define ixGC_CAC_CNTL 0x0021

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h

11322

#define ixGC_CAC_CNTL 0x0001

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_offset.h

11725

#define ixGC_CAC_CNTL 0x0001

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h

9636

#define ixGC_CAC_CNTL 0x0001

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_offset.h

10714

#define ixGC_CAC_CNTL 0x0001

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

6855

#define ixGC_CAC_CNTL 0x0000

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

7081

#define ixGC_CAC_CNTL 0x0000

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

7125

#define ixGC_CAC_CNTL 0x0000

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h

7394

#define ixGC_CAC_CNTL 0x0000

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.h

44

#define ixGC_CAC_CNTL 0x0000