drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

11301

#define ixDIDT_TD_CTRL0 0x0060

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

13551

#define ixDIDT_TD_CTRL0 0x0060

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

7193

#define ixDIDT_TD_CTRL0 0x0040

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

7400

#define ixDIDT_TD_CTRL0 0x0040

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

7438

#define ixDIDT_TD_CTRL0 0x0040

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h

87

#define ixDIDT_TD_CTRL0 0x0040

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2519

#define ixDIDT_TD_CTRL0 0x40

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2544

#define ixDIDT_TD_CTRL0 0x40

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2791

#define ixDIDT_TD_CTRL0 0x40

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2769

#define ixDIDT_TD_CTRL0 0x40