Symbol: flush_icache_range
arch/alpha/include/asm/cacheflush.h
20
#define flush_icache_range(start, end) imb()
arch/alpha/include/asm/cacheflush.h
22
#define flush_icache_range(start, end) smp_imb()
arch/arc/mm/cache.c
787
void flush_icache_range(unsigned long kstart, unsigned long kend)
arch/arm/include/asm/cacheflush.h
274
#define flush_icache_range(s,e) __cpuc_coherent_kern_range(s,e)
arch/arm64/include/asm/cacheflush.h
105
#define flush_icache_range flush_icache_range
arch/arm64/include/asm/cacheflush.h
82
static inline void flush_icache_range(unsigned long start, unsigned long end)
arch/csky/abiv1/inc/abi/cacheflush.h
49
#define flush_icache_range(start, end) cache_wbinv_range(start, end)
arch/csky/abiv2/inc/abi/cacheflush.h
37
#define flush_icache_range(start, end) cache_wbinv_range(start, end)
arch/hexagon/include/asm/cacheflush.h
38
#define flush_icache_range flush_icache_range
arch/hexagon/mm/cache.c
35
void flush_icache_range(unsigned long start, unsigned long end)
arch/loongarch/include/asm/cacheflush.h
37
#define flush_icache_range local_flush_icache_range
arch/m68k/include/asm/cacheflush_no.h
13
#define flush_icache_range(start, len) __flush_icache_all()
arch/m68k/mm/cache.c
91
void flush_icache_range(unsigned long address, unsigned long endaddr)
arch/microblaze/include/asm/cacheflush.h
56
#define flush_icache_range(start, end) mbc->iflr(start, end);
arch/nios2/mm/cacheflush.c
115
void flush_icache_range(unsigned long start, unsigned long end)
arch/parisc/include/asm/cacheflush.h
65
#define flush_icache_range(s,e) do { \
arch/powerpc/include/asm/cacheflush.h
54
#define flush_icache_range flush_icache_range
arch/powerpc/mm/cacheflush.c
58
void flush_icache_range(unsigned long start, unsigned long stop)
arch/riscv/include/asm/cacheflush.h
80
#define flush_icache_range flush_icache_range
arch/riscv/include/asm/cacheflush.h
81
static inline void flush_icache_range(unsigned long start, unsigned long end)
arch/sh/mm/cache.c
231
void flush_icache_range(unsigned long start, unsigned long end)
arch/sparc/include/asm/cacheflush_32.h
18
#define flush_icache_range(start, end) do { } while (0)
arch/sparc/mm/init_64.c
500
void __kprobes flush_icache_range(unsigned long start, unsigned long end)
arch/xtensa/include/asm/cacheflush.h
105
#define flush_icache_range flush_icache_range
arch/xtensa/include/asm/cacheflush.h
110
#define flush_icache_range local_flush_icache_range
arch/xtensa/include/asm/cacheflush.h
143
#define flush_icache_range local_flush_icache_range
arch/xtensa/kernel/smp.c
595
void flush_icache_range(unsigned long start, unsigned long end)
include/asm-generic/cacheflush.h
71
static inline void flush_icache_range(unsigned long start, unsigned long end)