Symbol: ci_populate_phase_value_based_on_mclk
drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
1157
static int ci_populate_phase_value_based_on_mclk(struct pp_hwmgr *hwmgr, const struct phm_phase_shedding_limits_table *pl,
drivers/gpu/drm/radeon/ci_dpm.c
2352
static void ci_populate_phase_value_based_on_mclk(struct radeon_device *rdev,