drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

6715

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

6529

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

6352

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

29233

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

9006

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h

11831

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0x0000000f

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h

5318

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h

5960

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h

6562

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h

6440

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_sh_mask.h

7787

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_7_sh_mask.h

29715

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_8_0_sh_mask.h

19799

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_sh_mask.h

7450

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_sh_mask.h

7877

#define VM_L2_CNTL3__L2_CACHE_BIGK_FRAGMENT_SIZE__SHIFT 0xf