drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

6706

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

6520

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

6343

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

29224

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

8997

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h

11808

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h

5301

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x200000

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h

5943

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x200000

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h

6545

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x200000

drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h

6423

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x200000

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_sh_mask.h

7778

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_7_sh_mask.h

29706

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_8_0_sh_mask.h

19790

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_sh_mask.h

7441

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L

drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_sh_mask.h

7868

#define VM_L2_CNTL2__DISABLE_INVALIDATE_PER_DOMAIN_MASK 0x00200000L