Symbol: UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK
drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h
641
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x80000
drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h
643
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x80000
drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h
709
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h
1233
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h
2842
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h
1847
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h
3507
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h
2566
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h
3768
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h
3803
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h
3634
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h
3324
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_sh_mask.h
4816
#define UVD_SOFT_RESET__VCPU_VCLK_RESET_STATUS_MASK 0x00080000L