Symbol: UVD_PGFSM_STATUS__UVDC_PWR_STATUS__SHIFT
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h
53
#define UVD_PGFSM_STATUS__UVDC_PWR_STATUS__SHIFT 0x6
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h
1488
#define UVD_PGFSM_STATUS__UVDC_PWR_STATUS__SHIFT 0x6
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h
1491
#define UVD_PGFSM_STATUS__UVDC_PWR_STATUS__SHIFT 0x6
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h
2929
#define UVD_PGFSM_STATUS__UVDC_PWR_STATUS__SHIFT 0x6
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h
2019
#define UVD_PGFSM_STATUS__UVDC_PWR_STATUS__SHIFT 0x6