drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h

323

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h

424

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h

327

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h

359

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h

361

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x2

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h

490

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h

1009

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

2089

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

2342

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

4152

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

3265

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

3189

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

3201

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

3145

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

2734

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_sh_mask.h

4212

#define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L