drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h

372

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h

335

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x00000019

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h

376

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h

408

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h

410

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h

517

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h

1039

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

2408

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

3359

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

949

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

4672

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

4825

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

4868

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

4667

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

4240

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_sh_mask.h

5744

#define UVD_LMI_CTRL__IT_IT_DATA_COHERENCY_EN__SHIFT 0x19