drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h

368

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h

329

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x00000017

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h

372

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h

404

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h

406

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h

515

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h

1037

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

2406

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

3357

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

947

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

4670

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

4823

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

4866

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

4665

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

4238

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_sh_mask.h

5742

#define UVD_LMI_CTRL__DB_DB_DATA_COHERENCY_EN__SHIFT 0x17