drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

1542

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

1545

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

2983

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

2079

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

6361

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

7165

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

6188

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

5365

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_sh_mask.h

817

#define UVD_JPEG_POWER_STATUS__JPEG_PG_MODE_MASK 0x00000010L