drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

1562

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

1565

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

3003

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

2111

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

6392

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

7208

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

6225

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

5402

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_sh_mask.h

857

#define UVD_DPG_LMA_MASK__LMA_MASK_MASK 0xFFFFFFFFL