drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

1559

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

1562

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

3000

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

2108

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

6389

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

7205

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

6222

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

5399

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_sh_mask.h

854

#define UVD_DPG_LMA_DATA__LMA_DATA_MASK 0xFFFFFFFFL