drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h

162

#define UVD_CGC_GATE__SCPU__SHIFT 0x13

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h

99

#define UVD_CGC_GATE__SCPU__SHIFT 0x00000013

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h

162

#define UVD_CGC_GATE__SCPU__SHIFT 0x13

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h

174

#define UVD_CGC_GATE__SCPU__SHIFT 0x13

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h

176

#define UVD_CGC_GATE__SCPU__SHIFT 0x13

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h

396

#define UVD_CGC_GATE__SCPU__SHIFT 0x13

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h

824

#define UVD_CGC_GATE__SCPU__SHIFT 0x13

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

1842

#define UVD_CGC_GATE__SCPU__SHIFT 0x13