drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h

161

#define UVD_CGC_GATE__SCPU_MASK 0x80000

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h

98

#define UVD_CGC_GATE__SCPU_MASK 0x00080000L

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h

161

#define UVD_CGC_GATE__SCPU_MASK 0x80000

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h

173

#define UVD_CGC_GATE__SCPU_MASK 0x80000

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h

175

#define UVD_CGC_GATE__SCPU_MASK 0x80000

drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h

416

#define UVD_CGC_GATE__SCPU_MASK 0x00080000L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h

844

#define UVD_CGC_GATE__SCPU_MASK 0x00080000L

drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

1863

#define UVD_CGC_GATE__SCPU_MASK 0x00080000L