arch/m68k/include/asm/MC68328.h

750

#define TCR TCR1

arch/m68k/include/asm/MC68EZ328.h

605

#define TCR WORD_REF(TCR_ADDR)

arch/m68k/include/asm/MC68VZ328.h

697

#define TCR WORD_REF(TCR_ADDR)

arch/sh/include/asm/dma-register.h

16

#define TCR 0x08 /* Transfer Count Register */

drivers/clocksource/sh_mtu2.c

56

#define TCR 0 /* channel register */

drivers/clocksource/sh_tmu.c

73

#define TCR 2 /* channel register */

drivers/clocksource/timer-keystone.c

24

#define TCR 0x20

drivers/dma/sh/shdmac.c

39

#define TCR 0x08 /* Transfer Count Register */

drivers/net/ethernet/smsc/smc9194.h

64

#define TCR 0 /* transmit control register */

drivers/net/ethernet/smsc/smc91c92_cs.c

149

#define TCR 0 /* transmit control register */

drivers/net/usb/rtl8150.c

22

#define TCR 0x012f

drivers/net/wan/hd64572.h

103

#define TCR 0x152 /* Tx DMA Critical Request Reg */

drivers/net/wireless/realtek/rtlwifi/rtl8192se/reg.h

36

#define TCR 0x0044

drivers/tty/synclink_gt.c

364

#define TCR 0x82 /* tx control */

drivers/watchdog/davinci_wdt.c

36

#define TCR (0x20)

sound/soc/dwc/local.h

47

#define TCR(x) (0x40 * x + 0x034)

sound/soc/intel/keembay/kmb_platform.h

39

#define TCR(x) (0x40 * (x) + 0x034)