drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

8964

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

9141

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h

7610

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h

9214

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h

4795

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h

25281

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h

25936

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

4694

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

4166

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

4072

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h

28716

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h

5040

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h

10535

#define TA_STATUS__TA_BUSY__SHIFT 0x0000001c

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h

13976

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h

15858

#define TA_STATUS__TA_BUSY__SHIFT 0x1c

drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h

16438

#define TA_STATUS__TA_BUSY__SHIFT 0x1c