drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h

474

#define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0x0f000000L

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h

3757

#define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0xf000000

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h

5193

#define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0xf000000

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h

5383

#define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0xf000000

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h

4371

#define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0xf000000

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h

5493

#define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0xf000000

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h

5397

#define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0xf000000

drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_sh_mask.h

1993

#define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0xf000000