Symbol: SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h
23844
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h
22042
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_sh_mask.h
21533
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_3_sh_mask.h
23863
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_sh_mask.h
17502
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_0_0_sh_mask.h
28873
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_0_sh_mask.h
29450
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
16341
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
17646
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
17521
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h
9770
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h
19822
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h
7590
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x00000001L
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h
8705
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x1
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h
10307
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x1
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h
10705
#define SPI_INTERP_CONTROL_0__FLAT_SHADE_ENA_MASK 0x1