Symbol: SMB_CSR
arch/mips/sibyte/swarm/rtc_m41t81.c
81
#define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))
arch/mips/sibyte/swarm/rtc_xicor1241.c
56
#define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))
drivers/i2c/busses/i2c-sibyte.c
24
#define SMB_CSR(a,r) ((long)(a->reg_base + r))
drivers/net/ethernet/marvell/sky2.h
1021
SMB_CSR = 0x0e44, /* 32 bit SMBus Control/Status Register */